ACiD-WG Workshop

Groningen, The Netherlands, September 9-10, 1996

The proceedings of this workshop are now available as technical report CSN9602, Computer Science Notes Series, University of Groningen. The preface is attached.

Please request your copy from

Eke Adema

Dept. of Comp. Science

P.O. Box 800

9700 AV Groningen

The Netherlands

e-mail: eke@cs.rug.nl

tel: +31 50 363 3939

Preface

The Working Group on Asynchronous Circuit Design (ACiD-WG) coordinates research, training and dissemination activities in Europe concerned with the design of self-timed digital VLSI circuits. It was funded by the European Commission as part of the Esprit Third Framework under contract nr. 7225. This enabled ACiD-WG to organize five workshops and sponsor a working conference. With Fourth Framework funding secured under contract nr. 21949, the Technical Management Committee of ACiD-WG is planning to organize three more workshops and a summer school and to sponsor an international symposium over the next three years.

The two-day Groningen workshop was the first in this new series of events. The 34 participants came from 20 different organizations, including 3 companies. All 10 member organizations of ACiD-WG were represented, viz., Polytechnic University of Catalonia; Technical University of Denmark; Technical University of Eindhoven; University of Groningen; IMEC; University of Manchester; University of Newcastle upon Tyne; Philips Research Laboratories; South Bank University; and Polytechnic University of Turin. There was also an invited speaker from Japan.

The first session of the workshop consisted of invited talks from European industry. One talk described the involvement of British Aerospace Defence (Dynamics Division) in real-time systems development, and its exploitation of asynchrony at the systems level with its "Data Interaction Architecture" and at the circuit level with its new "Butler Technology". This was followed by a short presentation about microelectronics research within Siemens, and the need to see further demonstration of the benefits of asynchronous circuits and associated design methodologies before Siemens would commit resources to this area.

The second session examined the current and planned activities of ACiD-WG. Dr. Verhoeff of Eindhoven University of Technology demonstrated the electronic "Encyclopedia of Delay-Insensitive Systems" that he has been constructing. Short statements were then delivered by representatives of each of the member organizations of ACiD-WG; a new group at Imperial College, London, also described their research activities, namely, the use of asynchronous buses for data communication rather than point-to-point communication channels; and the provision of a handshaking interface to locally-clocked modules.

The remainder of the workshop consisted of technical presentations on various topics in asynchronous circuit design. In particular, Philips Research had put forward two design problems (a loadable counter and an interrupt handler) in advance of the workshop and were looking for efficient solutions that they might wish to incorporate into their Tangram silicon compiler. Dr. Josephs showed how it was possible to engineer solutions out of "standard" asynchronous components, such as Prof. Alain Martin's Q element.

Dr. Yakovlev relied on logic synthesis to solve the two design problems. He demonstrated how the Petrify tool could be used to generate Boolean equations for each of the components in his solutions. This followed on from a series of presentations describing recent advances in the automatic synthesis of speed-independent circuits from Petri Nets or STGs.

Finally,the Philips team showed how a reasonable solution to the loadable counter problem, similar to Dr. Yakovlev's, could be achieved by "VLSI programming".

The workshop closed with a presentation by Dr. Lavagno dealing with the important topic of testing for fabrication faults. His approach had the advantage of being applicable to a variety of different asynchronous design styles.

M.B. Josephs

J.T. Udding

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Mark.Josephs@sbu.ac.uk
Last altered 21st November 1996