CALL FOR PAPERS =============== !!! EXTENDED DEADLINE: Feb 17, 2003 !!! ======================================== The 2003 International Conference on ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS --- ERSA'03 ================================================================ http://www.scism.sbu.ac.uk/ERA/ersa.html a part of The 2003 International MultiConference in Computer Science ========================================================== http://www.ashland.edu/~iajwa/conferences/ June 23--26, 2003 Monte Carlo Resort, Las Vegas, Nevada, USA Introduction ============ The recent years have shown a continuous interest in using reconfigurable computing platform for the design of application-specific computer systems. The advances in reconfigurable computing architecture, in algorithm implementation methods, and in automatic mapping methods of algorithms into hardware and processor spaces form together a new paradigm of computing and programming that has often been called `Computing in Space and Time' or `Computing without Computer'. This conference focuses on the different approaches in engineering of reconfigurable systems and implementing of algorithms, including theory, architecture, algorithms, design systems and applications that demonstrate the benefits of reconfigurable computing. ** Keynote Talk =============== The Rise of Reconfigurable Systems Dr. Nick Tredennick, Editor of Dynamic Silicon, Gilder Publishing, USA ** Invited Talks ================ 1. Collaborative and Reconfigurable Object Tracking Prof. Majid Sarrafzadeh, UCLA, USA 2. PACT XPP Architecture in Adaptive System-on-Chip Integration Prof. Juergen Becker, Univ. of Karlsruhe, Germany 3. Latest Developments at Quicksilver Tech. Dr. Steven Guccione, QuickSilver Tech., Inc., USA 4. Servers for Embedded Platform FPGAs Dr. Cameron Patterson, XILINX, USA ** Topics ================= 1. Theory - Synthesis, Mapping, Parallelization, Partitioning ... 2. Software - CAD, Languages, Compilers, Operating Systems ... 3. Hardware - Dynamic Hardware, CSoCs, Reconfigurable Processors ... 4. Applications - Wireless Communication, Software Radio, Smart Cameras ... ** Focus Sessions ================= A number of Focus Sessions are planned to organize. The preliminary list is given below. We accept proposals for new sessions. Please contact with ERSA Chairman Toomas Plaks (ersa@sbu.ac.uk) ** Best Papers ============== After the conference, authors of best papers will be invited to submit an extended version for publication in a Special Issue of an International Journal (last year was The Journal of Supercomputing, Kluwer). ** Desert Seminar ================= After the conference (probably on June 26th), an one day social event `Desert Seminar' will be organized. The aim of this is to help to create personal contacts between researchers and give more possibilities for discussions etc. It is planned to make a daytrip to the Death Valley. Interested persons should take contact with ERSA Chairman Toomas Plaks (ersa@sbu.ac.uk) and make their proposals. ** Exhibition ============= An exhibition is planned for the duration of the MultiConferences. Interested parties should contact ERSA Chairman Toomas Plaks. All exhibitors will be considered to be the co-sponsors of the conferences. ** Important Dates ================== ** Full papers (10 pages, IEEE format): February 17, 2003 ** Notification of acceptance: March 24, 2003 ** Camera-ready papers and registration: April 21, 2003 ** Conference: June 23--26, 2003 ** Submission ============= Prospective authors are invited to submit a full paper that must be an original, unpublished work, not currently submitted for publication or for consideration elsewhere. Full details are available on the ERSA Web-site: http://www.scism.sbu.ac.uk/ERA/ersa.html ** Other Conferences of Interest ================================ Together with ERSA there will be other conferences of interest: *VLSI - International Conference on VLSI *CIC - International Conference on Communications in Computing *ICWN - International Conference on Wireless Networks *CISST - International Conference on Imaging Science, Systems and Technology *IC - International Conference on Internet Computing *PDPTA - International Conference on Parallel and Distributed Processing Techniques and Applications For more details about other conferences, visit the Web-site: The 2003 International MultiConference in Computer Science ========================================================== http://www.ashland.edu/~iajwa/conferences/ For more details about ERSA, visit our Web-site: http://www.scism.sbu.ac.uk/ERA/ersa.html. ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ General Topics ============== The topics of interest include, but are not limited to: 1. Theory, Mapping and Parallelization. o Theoretical models of computing in space-time and adaptive computing. o Mapping algorithms into hardware and synthesis of regular arrays. o Parallelization and (space-time) partitioning of algorithms. o System architectures using configurable computing platform. o Newly developed algorithms for efficient implementation on reconfigurable systems. 2. Software, CAD and Operating Systems. o CAD, specification, partitioning and verification. o Hardware compilation, hardware/software codesign, developing correct circuits. o High and low-level languages and compilers, design environments. o Operating systems and run-time reconfiguring. o IP-based and object oriented models and mapping methods. 3. Adaptive Hardware Architectures. o Adaptive and dynamically reconfigurable systems. o Reconfigurable processor architectures. o Complex systems using reconfigurable processors. o Application-tailored reconfigurable Systems-on-Chip. o Low power systems on reconfigurable platform. 4. Applications. o Wireless communication systems --- mobile communication systems, video-phone, software radio, global positioning systems etc. o Multimedia and virtual reality --- video imaging, teleconferencing, data compression, image databases, computational geometry and computer graphics etc. o Automotive industry --- vehicle guidance, lane and obstacle detection, object recognition, traffic systems, navigation of robots etc. o Security systems --- object recognition and tracking, cryptology, Internet and security etc. o Classical image and signal processing --- digital filters, edge and line detection, morphological operators, motion and stereo estimation, discrete transformations, linear algebra, radar systems, object recognition etc. Preliminary List of Focus Sessions ================================== 1) High-level Synthesis of Reconfigurable Systems Chairman: Martin Middendorf, Univ. of Leipzig, Germany Email: middendorf@aifb.uni-karlsruhe.de o behavioural descriptions o cost functions for reconfigurable systems o optimization and design space exploration o partitioning and scheduling o resource allocation and binding o control synthesis o test, verification, and simulation approaches o models for reconfigurable target architectures 2) Operating System for Reconfigurable Hardware Chairman: Marco Platzner, ETH, Zurich, Switzerland Email: platzner@tik.ee.ethz.ch o task and resource management o scheduling: realtime and non-realtime o interfaces and communication o OS integration with host and networks o design environments o applications in embedded and general-purpose systems 3) The JBits Experience Chairman: Cameron Patterson, Xilinx Labs, USA Email: cameron.patterson@xilinx.com o JBits applications o Tools and flows using JBits o Hardware/software co-design and co-debug o Structural design techniques o Hardware abstractions o Real-time reconfiguration 4) Configurable Computing Architectures and Hardware Chairman: Christian Siemers, Univ. of Applied Sciences Nordhausen, Germany Email: siemers@fh-nordhausen.de o Space- and/or power-efficient architectures o Architectures for runtime-definable space/time-mapping o Architectural support for operating system and real-time behavior o Biology-inspired distributed architectures for configurable computing o Architecture definition and products for general and special purpose application classes 5) Configurable Systems-on-Chip Chairman: Juergen Becker, Univ. of Karlsruhe, Germany Email: becker@itiv.uni-karlsruhe.de o Application-tailored Configurable Datapath and Circuit Structures o Communication Interface Synthesis and SoC Integration o IP-based Hardware/Software Co-Engineering and SoC Integration Trade-offs o Reconfigurable Instruction Set Integration for Processor-Cores o Adaptivity, Self-Repairing and Testing Concepts for CSoCs o CSoC Applications, Prototyping and Industrial Aspects 6) From Reconfigurable Systems to Adaptive Systems Chairman: Steven Guccione, QuickSilver Tech., Inc., USA Email: Steven.Guccione@nospam.qstech.com o Fine-grain and coarse-grain architectures o System on Chip architectures o Hybrid architectures o Novel applications 7) Low Power Systems Using FPGAs Chairman: Ju-wook Jang, Sogang University, Korea Email: jjang@sogang.ac.kr o Power/energy consumption modeling for FPGA devices o Optimization techniques for Power/energy dissipation on FPGA o Estimation of power consumption for designs on FPGA devices o Low power/energy applications on FPGA o Design methodology for low power/energy consumption for FPGA o Low power implementation of network protocols using FPGA o Low power implementation of multimedia processing using FPGA o Other related issues 8) Reconfigurable Floating Point Processing Chairman: Maya Gokhale, Los Alamos National Laboratory, USA Email: maya@lanl.gov o customizable floating point libraries o fixed point/floating point tradeoffs in area, clock frequency, power o experience with use of floating point on reconfigurable devices for DSP, supercomputing or other applications o experience with mixed mode fixed/floating point applications o tools to infer optimal application-specific floating point sizes for mantissa and exponent o customized error handling in floating point arithmetic o Reconfigurable cell architectures optimized for floating point o Other floating point related topics : architectures, tools, applications 9) Software Defined Radio Chairman: Jeffrey Reed, Virginia Tech., USA Email: reedjh@vt.edu o Design methodologies for reconfigurable radios o Custom Computing Machines (CCM) for Software Radios o Flexible interconnects for high bandwidth I/O o VLSI architectures for numerical communication algorithms in Software radios eg: SVD, CORDIC o Software communication architecture (SCA) implementation on CCMs o Performance evaluation of radio architectures using DSPs FPGAs and CCMs o Issues with downloadable run time configuration o Software/Hardware Verification 10) Custom Computing Machines for Image Processing Chairman: Marek Gorgon, TAGH University of Technology, Krakow, Poland Email: mago@biocyb.ia.agh.edu.pl o Reconfigurable Architectures for Image Processing o Complex Image Processing Algorithms for CCM o Real-time Imaging: Run Time Reconfiguration and Software/Hardware Systems o FPGA-based modules, libraries and IP Cores for Image Processing o FPGA-based Image Compression o Image co-processors and display accelerators 11) will be extended.... For more details, visit our Web-site: http://www.scism.sbu.ac.uk/ERA/ersa.html. If you have any questions or problems, please do not hesitate to e-mail: ersa@sbu.ac.uk or directly to conference chair Toomas Plaks: plakst@sbu.ac.uk (postal address is given below). Conference Chairman =================== Dr. Toomas P. Plaks email: plakst@sbu.ac.uk SCISM South Bank University 103 Borough Road London SE1 0AA United Kingdom General Co-Chair ================ Prof. Peter M. Athanas Virginia Tech., USA Industrial Co-Chair =================== John Watson QuickSilver Tech., Inc., USA Advisory Board ============== Prof. Reiner W. Hartenstein Univ. of Kaiserslautern, Germany Prof. Viktor K. Prasanna Univ. of Southern California, USA Dr. Nick Tredennick Gilder Publishing, USA Steering Committee ================== Carl Ebeling, University of Washington, USA Hossam ElGindy, Univ. of New South Wales, Australia Dominique Lavenier, IRISA, France Wayne Luk, Imperial College, UK Lothar Thiele, ETH, Zurich, Switzerland Programme Committee =================== Peter Athanas, Virginia Tech., USA Kia Bazargan, Univ. Minnesota, USA Juergen Becker, Univ. of Karlsruhe, Germany Oliver Diessel, Univ. of New South Wales, Australia Carl Ebeling, Univ. of Washington, USA Hossam ElGindy, Univ. of New South Wales, Australia Maya Gokhale, Los Alamos National Laboratory, USA Marek Gorgon, AGH Univ. of Technology, Poland Steven Guccione, QuickSilver Tech., Inc., USA Reiner Hartenstein, Univ. of Kaiserslautern, Germany Ju-wook Jang, Sogang Univ., Korea Jack Jean, Wright State Univ., USA Ryan Kastner, University of California, Santa Barbara, USA Richard Katz, NASA Goddard Space Flight Center, USA David Kearney, Univ. of South Australia Andreas Koch, Tech. Univ. Braunschweig, Germany Rainer Kress, Infineon Technologies, Germany Shashi Kumar, Univ of Jonkoping, Sweden Dominique Lavenier, IRISA, France Miriam Leeser, Northeastern Univ., USA Bjorn Lisper, Univ. of Malardalen, Sweden Wayne Luk, Imperial College, UK John McHenry, National Security Agency, USA Graham Megson, The Univ. of Reading, UK Martin Middendorf, Univ. of Leipzig, Germany Koji Nakano, School of Information Science, JAIST, Japan Cameron Patterson, XILINX Research Labs, USA Gregory Peterson, The University of Tennessee, USA Sebastien Pillement, ENSSAT, France Toomas Plaks, South Bank Univ., UK Marco Platzner, ETH, Zurich, Switzerland Bernard Pottier, Univ. of Bretagne Occidentale, France Viktor Prasanna, Univ. of Southern California, USA Sanjay Rajopadhye, Colorado State Univ., USA Jeffrey Reed, Virginia Tech., USA Christian Siemers, Univ. of Applied Sciences Nordhausen, Germany Juergen Teich, Univ. of Erlangen-Nurnberg, Germany Lothar Thiele, ETH, Zurich, Switzerland Nick Tredennick, Gilder Publishing, USA Serge Vernalde, IMEC, Leuven, Belgium John Watson, QuickSilver Tech., Inc., USA Markus Weinhardt, PACT Informationstechologie GmbH, Germany Michael Wirthlin, Brigham Young Univ., USA